Using OpenCL for FPGAs and Preview of Xeon+FPGA architecture

This half day workshop will be held in conjunction with the International Symposium on Computer Architecture (ISCA 2016) in Seoul, South Korea

Date : Saturday, 18-June-2016

Location : Seoul, South Korea

Duration : 3.5 to 4 hours **

Audience : Primarily software developers interested in hybrid CPU+FPGA architectures. Some of the topics would be relevant to architects as well, e.g. looking at compilation to underlying programmable fabric 


The workshop will introduce FPGAs and how they can be programmed using higher level abstractions and methods (as opposed at RTL level) with the Altera OpenCL toolchain. Brief introduction to architecture of FPGAs and OpenCL programming language will be provided. The emphasis of the talk will be on the underlying hardware level compilation  as done by the OpenCL compiler for discrete FPGA systems. Based on this high level overview,  the multi-package Xeon+FPGA platform will be discussed. The overarching theme will be how the discrete programming model is applicable in the hybrid case


Detailed Program


  1. Using OpenCL for FPGAs

9 am – 10:30 am, Speaker – Dmitry Denisenko

  • Introduction to FPGAs
  • Very brief introduction to OpenCL programming language
  • Hardware and software stacks for discrete FPGA systems
  • How OpenCL concepts map to FPGA hardware
  • Example architectures for high-performance applications

2. Hardware Research Prototype – An Overview

10:30 PM – 11:30 PM, Speaker – David Sheffield

  • HARP (Xeon + FPGA) Prototype Architecture
  • Research overview and insights from HARP
  • Future HARP plans

3. Xeon+FPGA Architecture

11:30 am – 12:30 PM, Speaker – Bhushan Chitlur

  • Overview of the Xeon+FPGA Multichip Package Architecture
  • Workloads for Xeon+FPGA


**Please note that the workshop has been reduced from full day event to half day event. Participant hands-on which was planned initially would not be provided now. The organizer apologizes to the registered participants for the inconvenience inevitably caused as a result of this change in schedule.